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@@ -152,6 +152,7 @@ static const charger_channel_t charger_Channels[INA3221_CH_NUM] = {
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};
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};
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/* Privae functions */
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/* Privae functions */
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+static void SRAM_Init(void);
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static void prepare_Screen(void);
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static void prepare_Screen(void);
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static void ina_Process(void);
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static void ina_Process(void);
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static void mode_vt_cb(virtual_timer_t *vtp, void *st);
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static void mode_vt_cb(virtual_timer_t *vtp, void *st);
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@@ -193,6 +194,15 @@ static FATFS SDC_FS; /* FS object. */
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static bool fs_ready = false; /* FS mounted and ready.*/
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static bool fs_ready = false; /* FS mounted and ready.*/
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static uint8_t fbuff[1024]; /* Generic large buffer.*/
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static uint8_t fbuff[1024]; /* Generic large buffer.*/
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+#define Bank1_SRAM2_ADDR ((uint32_t)0x68000000)
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+static uint16_t * sram_array = (uint16_t *)0x68000000;
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+static int arrayIdx = 0;
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+static int dechargeIdx = 0;
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+static int chargeIdx = 0;
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+static uint32_t sCurrent = 0;
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+static uint32_t sVoltage = 0;
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+static int sIdx = 0;
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+
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/*
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/*
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* INA process thread.
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* INA process thread.
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*/
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*/
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@@ -318,6 +328,7 @@ int main(void) {
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gfxInit();
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gfxInit();
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prepare_Screen();
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prepare_Screen();
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graph_Init();
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graph_Init();
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+ SRAM_Init();
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/*
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/*
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* Activates the I2C driver 1.
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* Activates the I2C driver 1.
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@@ -421,6 +432,24 @@ int main(void) {
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events = chEvtWaitAny(ALL_EVENTS);
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events = chEvtWaitAny(ALL_EVENTS);
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if (events & INA_ALL_VALUSE) {
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if (events & INA_ALL_VALUSE) {
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+ if (charger_State == dech_Capacity_I || charger_State == Charge2) {
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+ sVoltage += Voltage;
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+ sCurrent += Current;
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+ sIdx ++;
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+ if (sIdx >= 60) {
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+ sIdx = 0;
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+ sVoltage /= 60;
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+ sCurrent /= 60;
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+ sram_array[arrayIdx] = sVoltage;
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+ arrayIdx ++;
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+ sram_array[arrayIdx] = sCurrent;
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+ arrayIdx ++;
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+ graph_Draw(sVoltage, sCurrent);
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+ sVoltage = 0;
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+ sCurrent = 0;
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+ }
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+ }
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+
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tmp1 = Voltage / 1000;
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tmp1 = Voltage / 1000;
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tmp2 = Voltage % 1000;
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tmp2 = Voltage % 1000;
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chsnprintf(buf, 11, "U:%2d.%03u V", tmp1, tmp2);
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chsnprintf(buf, 11, "U:%2d.%03u V", tmp1, tmp2);
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@@ -448,8 +477,6 @@ int main(void) {
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chsnprintf(buf, 13, "CP:%2d.%1u WH", tmp1, tmp2);
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chsnprintf(buf, 13, "CP:%2d.%1u WH", tmp1, tmp2);
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gdispFillStringBox(0, MENU_LINE_7, MENU_LINE_W, MENU_LINE_H, buf, font2, Red, Gray, gJustifyLeft);
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gdispFillStringBox(0, MENU_LINE_7, MENU_LINE_W, MENU_LINE_H, buf, font2, Red, Gray, gJustifyLeft);
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- graph_Draw(Voltage, Current);
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-
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/* Check charge/decharge conditions */
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/* Check charge/decharge conditions */
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switch (charger_State) {
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switch (charger_State) {
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case Charge1:
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case Charge1:
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@@ -499,6 +526,7 @@ int main(void) {
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if (events & CHRGR_ST_CHANGE) {
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if (events & CHRGR_ST_CHANGE) {
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switch (charger_State) {
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switch (charger_State) {
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case Charge1:
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case Charge1:
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+ gwinClear(GW1);
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if (Profile[charger_Profile].VoltageDechMin_mv > Voltage) {
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if (Profile[charger_Profile].VoltageDechMin_mv > Voltage) {
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gwinPrintf(GW1, "No Battery detected / Low voltage...\n");
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gwinPrintf(GW1, "No Battery detected / Low voltage...\n");
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charger_State = Stop;
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charger_State = Stop;
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@@ -545,6 +573,11 @@ int main(void) {
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case Decharge:
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case Decharge:
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oldState = Decharge;
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oldState = Decharge;
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+ arrayIdx = 0;
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+ dechargeIdx = 0;
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+ sVoltage = 0;
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+ sCurrent = 0;
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+ sIdx = 0;
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Capacity_I = 0;
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Capacity_I = 0;
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Capacity_P = 0;
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Capacity_P = 0;
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Timer.hh = 0;
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Timer.hh = 0;
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@@ -586,6 +619,10 @@ int main(void) {
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break;
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break;
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case Charge2:
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case Charge2:
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+ chargeIdx = 0;
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+ sVoltage = 0;
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+ sCurrent = 0;
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+ sIdx = 0;
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Capacity_I = 0;
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Capacity_I = 0;
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Capacity_P = 0;
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Capacity_P = 0;
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Timer.hh = 0;
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Timer.hh = 0;
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@@ -650,6 +687,26 @@ int main(void) {
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}
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}
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}
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}
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+/**
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+ * @brief Initializes the SRAM device.
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+ * @retval SRAM status
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+ */
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+static void SRAM_Init(void) {
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+ const unsigned char FSMC_Bank = 0x04; // FSMC_NE3
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+
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+ /* Initialize SRAM control Interface 16bit, write enable*/
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+ FSMC_Bank1->BTCR[FSMC_Bank] |= (uint32_t)(0x10 | 0x1000);
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+
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+ /* Initialize SRAM timing Interface */
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+ FSMC_Bank1->BTCR[FSMC_Bank + 1U] |= (uint32_t)(2 | (1<<4U) | (2<<8U) | (1<<16U) | ((2-1U)<<20U) | ((2-2U)<<24U));
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+
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+ /* Initialize SRAM extended mode timing Interface */
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+ FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFFU;
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+
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+ /* Enable the NORSRAM device */
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+ FSMC_Bank1->BTCR[FSMC_Bank] |= 0x1; //FMC_BCR1_MBKEN;
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+}
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+
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/**
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/**
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* @brief Prepare screen for information presentation.
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* @brief Prepare screen for information presentation.
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*/
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*/
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