board.c 17 KB

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  1. #include "board.h"
  2. #include "stm32g0xx_ll_rcc.h"
  3. #include "stm32g0xx_ll_bus.h"
  4. #include "stm32g0xx_ll_gpio.h"
  5. #include "stm32g0xx_ll_usart.h"
  6. #include "stm32g0xx_ll_dma.h"
  7. #include "stm32g0xx_ll_dmamux.h"
  8. #include "stm32g0xx_ll_i2c.h"
  9. #include "stm32g0xx_ll_spi.h"
  10. /* private variables */
  11. /* private functions */
  12. static void GPIO_Init(void);
  13. static void DMA_Init(void);
  14. static void I2C1_Init(void);
  15. static void SPI1_Init(void);
  16. static void TIM1_Init(void);
  17. static void TIM3_Init(void);
  18. static void TIM14_Init(void);
  19. static void TIM16_Init(void);
  20. static void TIM17_Init(void);
  21. static void USART1_UART_Init(void);
  22. /* Board perephireal Configuration */
  23. void Board_Init(void)
  24. {
  25. RCC->APBENR2 |= RCC_APBENR2_SYSCFGEN;
  26. RCC->APBENR1 |= RCC_APBENR1_PWREN;
  27. /* Peripheral interrupt init*/
  28. /* RCC_IRQn interrupt configuration */
  29. NVIC_SetPriority(RCC_IRQn, 0);
  30. NVIC_EnableIRQ(RCC_IRQn);
  31. /* Configure the system clock */
  32. SystemClock_Config();
  33. /* Processor uses sleep as its low power mode */
  34. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  35. /* DisableSleepOnExit */
  36. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  37. /* Initialize all configured peripherals */
  38. GPIO_Init();
  39. DMA_Init();
  40. I2C1_Init();
  41. SPI1_Init();
  42. /* Start RGB & Tube Power PWM */
  43. TIM1_Init();
  44. TIM3_Init();
  45. //TIM14_Init();
  46. //TIM16_Init();
  47. //TIM17_Init();
  48. USART1_UART_Init();
  49. }
  50. /**
  51. * @brief System Clock Configuration
  52. * @retval None
  53. */
  54. void SystemClock_Config(void)
  55. {
  56. /* HSI configuration and activation */
  57. RCC->CR |= RCC_CR_HSIKERON; // Enable HSI even in stop mode
  58. while((RCC->CR & RCC_CR_HSIRDY) == 0)
  59. {
  60. }
  61. /* Main PLL configuration and activation */
  62. RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  63. RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLR_0);
  64. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  65. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  66. while((RCC->CR & RCC_CR_PLLRDY) == 0)
  67. {
  68. }
  69. /* Set AHB prescaler*/
  70. //RCC->CFGR &= ~(RCC_CFGR_HPRE);
  71. //RCC->CFGR |= 0x00000000U;
  72. /* Sysclk activation on the main PLL */
  73. RCC->CFGR &= RCC_CFGR_SW;
  74. RCC->CFGR |= RCC_CFGR_SW_1;
  75. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1)
  76. {
  77. }
  78. /* Set APB1 prescaler !!! uncorrect !!! */
  79. //RCC->CFGR &= RCC_CFGR_PPRE;
  80. //RCC->CFGR |= 0x00000000U;
  81. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  82. SystemCoreClock = 24000000;
  83. /* Set I2C Clock Source */
  84. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  85. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  86. }
  87. /**
  88. * @brief GPIO Initialization Function
  89. * @param None
  90. * @retval None
  91. */
  92. static void GPIO_Init(void)
  93. {
  94. /* GPIO Ports Clock Enable */
  95. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  96. /* EXTI Line: falling, no pull, input */
  97. // mode
  98. EXTI->EMR1 &= ~(EXTI_IMR1_IM14);
  99. EXTI->EMR1 |= EXTI_IMR1_IM14;
  100. // TRIGGER FALLING
  101. EXTI->FTSR1 &= ~(EXTI_IMR1_IM14);
  102. EXTI->FTSR1 |= EXTI_IMR1_IM14;
  103. // ?
  104. EXTI->FTSR1 |= EXTI_IMR1_IM14;
  105. /* EXTI interrupt init*/
  106. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  107. NVIC_EnableIRQ(EXTI4_15_IRQn);
  108. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  109. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  110. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  111. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  112. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  113. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  114. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  115. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  116. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  117. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  118. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  119. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  120. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  121. /* Pwer Shutdown: PP out, high speed, pull down */
  122. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  123. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  124. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  125. /* SPI Latch: OD out, high speed, no pull */
  126. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  127. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  128. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  129. /* UART_Enable: PP out, low speed, no pull*/
  130. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  131. /* UART_State: input, pull up */
  132. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  133. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  134. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  135. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  136. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  137. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  138. }
  139. /**
  140. * Enable DMA controller clock
  141. */
  142. static void DMA_Init(void)
  143. {
  144. /* Init with LL driver */
  145. /* DMA controller clock enable */
  146. RCC->AHBSMENR |= RCC_AHBENR_DMA1EN;
  147. /* DMA interrupt init */
  148. /* DMA1_Channel1_IRQn interrupt configuration */
  149. NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
  150. NVIC_EnableIRQ(DMA1_Channel1_IRQn);
  151. /* DMA1_Channel2_3_IRQn interrupt configuration */
  152. NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
  153. NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
  154. }
  155. /**
  156. * @brief I2C1 Initialization Function
  157. * @param None
  158. * @retval None
  159. */
  160. static void I2C1_Init(void)
  161. {
  162. /* Peripheral clock enable */
  163. RCC->APBENR1 |= RCC_APBENR1_I2C1EN;
  164. RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
  165. /** I2C1 GPIO Configuration
  166. PB8 ------> I2C1_SCL
  167. PB9 ------> I2C1_SDA
  168. */
  169. GPIO_SetPinMode(GPIOB, GPIO_PIN_8, GPIO_MODE_AFF);
  170. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_8, GPIO_OTYPE_OD);
  171. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_8, GPIO_OSPEED_HI);
  172. GPIO_SetPinPull(GPIOB, GPIO_PIN_8, GPIO_PUPDR_UP);
  173. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_8, GPIO_AF_6);
  174. GPIO_SetPinMode(GPIOB, GPIO_PIN_9, GPIO_MODE_AFF);
  175. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_9, GPIO_OTYPE_OD);
  176. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_9, GPIO_OSPEED_HI);
  177. GPIO_SetPinPull(GPIOB, GPIO_PIN_9, GPIO_PUPDR_UP);
  178. GPIO_SetAFPin_8_15(GPIOB, GPIO_PIN_9, GPIO_AF_6);
  179. /** I2C1 DMA Init */
  180. /* I2C1_RX Init: Priority medium, Memory increment, read from perephireal,
  181. transfer error interrupt enable, transfer complete interrupt enable */
  182. DMA1_Channel2->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  183. /* Route DMA channel 2 to I2C1 RX */
  184. DMAMUX1_Channel2->CCR = 10;
  185. /* I2C1_TX Init: Priority medium, Memory increment, read from memory,
  186. transfer error interrupt enable, transfer complete interrupt enable */
  187. DMA1_Channel3->CCR = (DMA_CCR_PL_0 | DMA_CCR_MINC| DMA_CCR_DIR | DMA_CCR_TEIE | DMA_CCR_TCIE);
  188. /* Route DMA channel 3 to I2C1 TX */
  189. DMAMUX1_Channel3->CCR = 11;
  190. /** I2C Initialization: I2C_Fast */
  191. I2C1->TIMINGR = 0x0010061A;
  192. I2C1->CR2 = I2C_CR2_AUTOEND;
  193. I2C1->CR1 = I2C_CR1_PE;
  194. }
  195. /**
  196. * @brief SPI1 Initialization Function
  197. * @param None
  198. * @retval None
  199. */
  200. static void SPI1_Init(void)
  201. {
  202. /* Peripheral clock enable */
  203. RCC->APBENR2 |= RCC_APBENR2_SPI1EN;
  204. RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
  205. /**SPI1 GPIO Configuration
  206. PB3 ------> SPI1_SCK
  207. PB5 ------> SPI1_MOSI
  208. */
  209. GPIO_SetPinMode(GPIOB, GPIO_PIN_3, GPIO_MODE_AFF);
  210. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_3, GPIO_OTYPE_OD);
  211. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_3, GPIO_OSPEED_HI);
  212. GPIO_SetPinMode(GPIOB, GPIO_PIN_5, GPIO_MODE_AFF);
  213. GPIO_SetPinOutputType(GPIOB, GPIO_PIN_5, GPIO_OTYPE_OD);
  214. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_5, GPIO_OSPEED_HI);
  215. /* SPI1 DMA Init */
  216. /* SPI1_TX Init: Priority high, Memory increment, read from memory, circular mode,
  217. Enable DMA transfer complete/error interrupts */
  218. DMA1_Channel1->CCR = (DMA_CCR_PL_1 | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_TEIE | DMA_CCR_TCIE);
  219. /* Route DMA channel 1 to SPI1 TX */
  220. DMAMUX1_Channel1->CCR = 0x11;
  221. /* SPI1 interrupt Init */
  222. NVIC_SetPriority(SPI1_IRQn, 0);
  223. NVIC_EnableIRQ(SPI1_IRQn);
  224. /* SPI1 parameter configuration: master mode, data 8 bit, divider = 16, TX DMA */
  225. SPI1->CR1 = (SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_BR_0);
  226. SPI1->CR2 = (SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 | SPI_CR2_TXDMAEN);
  227. }
  228. /**
  229. * @brief TIM1 Initialization Function
  230. * @param None
  231. * @retval None
  232. */
  233. static void TIM1_Init(void)
  234. {
  235. /* Peripheral clock TIM1 enable */
  236. RCC->APBENR2 |= RCC_APBENR2_TIM1EN;
  237. /* Peripheral clock GPIOA enable */
  238. RCC->IOPENR |= RCC_IOPENR_GPIOAEN;
  239. /* target clock - 200 Hz */
  240. TIM1->PSC = TIM1_PSC; // prescaler
  241. TIM1->ARR = TIM1_ARR; // auto reload value
  242. TIM1->CR1 = TIM_CR1_ARPE;
  243. // initial pwm value
  244. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  245. TIM1->CCR2 = PWM_LED_INIT_VAL;
  246. TIM1->CCR3 = PWM_LED_INIT_VAL;
  247. TIM1->CCR4 = PWM_LED_INIT_VAL;
  248. // pwm mode 1 for 4 chanels
  249. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  250. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  251. // reset int flag - not needed, int unused
  252. //TIM1->SR |= TIM_SR_UIF;
  253. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  254. TIM1->EGR = TIM_EGR_UG; // force timer update
  255. /* TIM1 CC_EnableChannel */
  256. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  257. /* TIM_EnableCounter */
  258. TIM1->CR1 |= TIM_CR1_CEN;
  259. /** TIM1 GPIO Configuration
  260. PA8 ------> TIM1_CH1
  261. PA9 ------> TIM1_CH2
  262. PA10 ------> TIM1_CH3
  263. PA11 [PA9] ------> TIM1_CH4
  264. */
  265. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  266. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  267. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  268. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  269. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  270. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  271. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  272. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  273. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  274. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  275. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  276. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  277. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  278. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  279. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  280. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  281. }
  282. /**
  283. * @brief TIM3 Initialization Function
  284. * @param None
  285. * @retval None
  286. */
  287. static void TIM3_Init(void)
  288. {
  289. /* Peripheral clock TIM1 enable */
  290. RCC->APBENR1 |= RCC_APBENR1_TIM3EN;
  291. /* Peripheral clock GPIOA and GPIOB enable */
  292. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN);
  293. /* target clock - 200 Hz */
  294. TIM3->PSC = TIM3_PSC; // prescaler
  295. TIM3->ARR = TIM3_ARR; // auto reload value
  296. TIM3->CR1 = TIM_CR1_ARPE;
  297. // initial pwm value
  298. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  299. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  300. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  301. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  302. // pwm mode 1 for 4 chanels
  303. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  304. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  305. // launch timer
  306. TIM3->EGR = TIM_EGR_UG; // force timer update
  307. /* TIM3 TIM_CC_EnableChannel */
  308. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  309. /* TIM3 enable */
  310. TIM3->CR1 |= TIM_CR1_CEN;
  311. /**TIM3 GPIO Configuration
  312. PA6 ------> TIM3_CH1
  313. PA7 ------> TIM3_CH2
  314. PB0 ------> TIM3_CH3
  315. PB1 ------> TIM3_CH4
  316. */
  317. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  318. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  319. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  320. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  321. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  322. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  323. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  324. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  325. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  326. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  327. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  328. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  329. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  330. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  331. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  332. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  333. }
  334. /**
  335. * @brief TIM14 Initialization Function
  336. * @param None
  337. * @retval None
  338. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  339. */
  340. static void TIM14_Init(void)
  341. {
  342. /* Peripheral clock enable */
  343. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  344. /* TIM14 interrupt Init */
  345. NVIC_SetPriority(TIM14_IRQn, 0);
  346. NVIC_EnableIRQ(TIM14_IRQn);
  347. /* Set TIM14 for 1 sec period */
  348. TIM14->PSC = TIM14_PSC;
  349. TIM14->ARR = TIM14_ARR;
  350. /* Enable: Auto-reload preload, One-pulse mode, */
  351. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  352. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  353. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  354. /* Enable Channel_1 or no needed ??? */
  355. TIM14->CCER = TIM_CCER_CC1E;
  356. /* Impulse value in msek */
  357. TIM14->CCR1 = TIM14_PULSE_VAL;
  358. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  359. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  360. TIM14->DIER = TIM_DIER_CC1IE;
  361. }
  362. /**
  363. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  364. */
  365. void Blink_Start(void)
  366. {
  367. /* enable all channels */
  368. TUBE_ALL_ON;
  369. /* clear IRQ flag */
  370. TIM14->SR |= TIM_SR_CC1IF;
  371. /* clear counter value */
  372. TIM14->CNT = 0;
  373. /* enable timer */
  374. TIM14->CR1 |= TIM_CR1_CEN;
  375. }
  376. void Blink_Stop(void)
  377. {
  378. /* disable timer */
  379. TIM14->CR1 &= ~(TIM_CR1_CEN);
  380. /* On all tubes */
  381. TUBE_ALL_ON;
  382. }
  383. /**
  384. * @brief TIM16 Initialization Function
  385. * @param None
  386. * @retval None
  387. */
  388. static void TIM16_Init(void)
  389. {
  390. /* Peripheral clock enable */
  391. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  392. /* TIM16 interrupt Init */
  393. NVIC_SetPriority(TIM16_IRQn, 0);
  394. NVIC_EnableIRQ(TIM16_IRQn);
  395. /* setup clock */
  396. TIM16->PSC = TIM16_PSC; // prescaler
  397. TIM16->ARR = TIM16_ARR; // auto reload value
  398. TIM16->CR1 = TIM_CR1_ARPE;
  399. // initial pwm value
  400. //TIM16->CCR1 = TIM16_PWM_VAL;
  401. // pwm mode 1 for 1 chanel
  402. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  403. // reset int flag
  404. TIM16->SR |= TIM_SR_UIF;
  405. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  406. TIM16->EGR = TIM_EGR_UG; // force timer update
  407. /* TIM16 CC_EnableChannel */
  408. TIM16->CCER = TIM_CCER_CC1E;
  409. /* TIM_EnableCounter */
  410. TIM16->CR1 |= TIM_CR1_CEN;
  411. /* Enable IRQ */
  412. TIM16->DIER = TIM_DIER_UIE;
  413. }
  414. /**
  415. * @brief TIM17 Initialization Function
  416. * @param None
  417. * @retval None
  418. */
  419. static void TIM17_Init(void)
  420. {
  421. /* Peripheral clock enable */
  422. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  423. /* TIM17 interrupt Init */
  424. NVIC_SetPriority(TIM17_IRQn, 0);
  425. NVIC_EnableIRQ(TIM17_IRQn);
  426. /* setup clock */
  427. TIM17->PSC = TIM17_PSC; // prescaler
  428. TIM17->ARR = TIM17_ARR; // auto reload value
  429. TIM17->CR1 = TIM_CR1_ARPE;
  430. // initial pwm value
  431. //TIM17->CCR1 = TIM17_PWM_VAL;
  432. // pwm mode 1 for 1 chanel
  433. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  434. // reset int flag
  435. TIM17->SR |= TIM_SR_UIF;
  436. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  437. TIM17->EGR = TIM_EGR_UG; // force timer update
  438. /* TIM17 CC_EnableChannel */
  439. TIM17->CCER = TIM_CCER_CC1E;
  440. /* TIM_EnableCounter */
  441. TIM17->CR1 |= TIM_CR1_CEN;
  442. /* Enable IRQ */
  443. TIM17->DIER = TIM_DIER_UIE;
  444. }
  445. /**
  446. * @brief USART1 Initialization Function
  447. * @param None
  448. * @retval None
  449. */
  450. static void USART1_UART_Init(void)
  451. {
  452. /* Peripheral clock enable */
  453. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  454. RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
  455. /**USART1 GPIO Configuration
  456. PB6 ------> USART1_TX
  457. PB7 ------> USART1_RX
  458. */
  459. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  460. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  461. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  462. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  463. /* USART1 interrupt Init */
  464. NVIC_SetPriority(USART1_IRQn, 0);
  465. NVIC_EnableIRQ(USART1_IRQn);
  466. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  467. USART1->BRR = 138;
  468. /* USART1 Enable */
  469. USART1->CR1 |= USART_CR1_UE;
  470. /* Polling USART1 initialisation */
  471. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  472. {
  473. }
  474. }