board.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444
  1. #include "board.h"
  2. #include "stm32g0xx_ll_rcc.h"
  3. #include "stm32g0xx_ll_bus.h"
  4. #include "stm32g0xx_ll_gpio.h"
  5. #include "stm32g0xx_ll_usart.h"
  6. /* private variables */
  7. /* private functions */
  8. static void TIM1_Init(void);
  9. static void TIM3_Init(void);
  10. static void TIM14_Init(void);
  11. static void TIM16_Init(void);
  12. static void TIM17_Init(void);
  13. static void USART1_UART_Init(void);
  14. static void GPIO_Init(void);
  15. /* Board perephireal Configuration */
  16. void Board_Init(void)
  17. {
  18. RCC->APBENR2 |= RCC_APBENR2_SYSCFGEN;
  19. RCC->APBENR1 |= RCC_APBENR1_PWREN;
  20. /* Peripheral interrupt init*/
  21. /* RCC_IRQn interrupt configuration */
  22. NVIC_SetPriority(RCC_IRQn, 0);
  23. NVIC_EnableIRQ(RCC_IRQn);
  24. /* Configure the system clock */
  25. SystemClock_Config();
  26. /* Processor uses sleep as its low power mode */
  27. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  28. /* DisableSleepOnExit */
  29. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPONEXIT_Msk);
  30. /* Initialize all configured peripherals */
  31. GPIO_Init();
  32. /* Start RGB & Tube Power PWM */
  33. TIM1_Init();
  34. TIM3_Init();
  35. //TIM14_Init();
  36. //TIM16_Init();
  37. //TIM17_Init();
  38. USART1_UART_Init();
  39. }
  40. /**
  41. * @brief System Clock Configuration
  42. * @retval None
  43. */
  44. void SystemClock_Config(void)
  45. {
  46. /* HSI configuration and activation */
  47. RCC->CR |= RCC_CR_HSIKERON; // Enable HSI even in stop mode
  48. while((RCC->CR & RCC_CR_HSIRDY) == 0)
  49. {
  50. }
  51. /* Main PLL configuration and activation */
  52. RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PLLR);
  53. RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSI | (9 << RCC_PLLCFGR_PLLN_Pos) | RCC_PLLCFGR_PLLR_2 | RCC_PLLCFGR_PLLR_0);
  54. RCC->PLLCFGR |= RCC_PLLCFGR_PLLREN; // RCC_PLL_EnableDomain_SYS
  55. RCC->CR |= RCC_CR_PLLON; // RCC_PLL_Enable
  56. while((RCC->CR & RCC_CR_PLLRDY) == 0)
  57. {
  58. }
  59. /* Set AHB prescaler*/
  60. //RCC->CFGR &= ~(RCC_CFGR_HPRE);
  61. //RCC->CFGR |= 0x00000000U;
  62. /* Sysclk activation on the main PLL */
  63. RCC->CFGR &= RCC_CFGR_SW;
  64. RCC->CFGR |= RCC_CFGR_SW_1;
  65. while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_1)
  66. {
  67. }
  68. /* Set APB1 prescaler !!! uncorrect !!! */
  69. //RCC->CFGR &= RCC_CFGR_PPRE;
  70. //RCC->CFGR |= 0x00000000U;
  71. /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
  72. SystemCoreClock = 24000000;
  73. /* Set I2C Clock Source */
  74. RCC->CCIPR &= ~(RCC_CCIPR_I2C1SEL);
  75. RCC->CCIPR |= RCC_CCIPR_I2C1SEL_1;
  76. }
  77. /**
  78. * @brief GPIO Initialization Function
  79. * @param None
  80. * @retval None
  81. */
  82. static void GPIO_Init(void)
  83. {
  84. /* GPIO Ports Clock Enable */
  85. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN | RCC_IOPENR_GPIOCEN);
  86. /* EXTI Line: falling, no pull, input */
  87. // mode
  88. EXTI->EMR1 &= ~(EXTI_IMR1_IM14);
  89. EXTI->EMR1 |= EXTI_IMR1_IM14;
  90. // TRIGGER FALLING
  91. EXTI->FTSR1 &= ~(EXTI_IMR1_IM14);
  92. EXTI->FTSR1 |= EXTI_IMR1_IM14;
  93. // ?
  94. EXTI->FTSR1 |= EXTI_IMR1_IM14;
  95. /* EXTI interrupt init*/
  96. NVIC_SetPriority(EXTI4_15_IRQn, 0);
  97. NVIC_EnableIRQ(EXTI4_15_IRQn);
  98. /* L0, L1, L2, L3 - IN-15 symbols control, PP out, high speed, pull down */
  99. GPIO_SetPinMode(LC0_GPIO_Port, LC0_Pin, GPIO_MODE_OUT);
  100. GPIO_SetPinSpeed(LC0_GPIO_Port, LC0_Pin, GPIO_OSPEED_HI);
  101. GPIO_SetPinPull(LC0_GPIO_Port, LC0_Pin, GPIO_PUPDR_DW);
  102. GPIO_SetPinMode(LC1_GPIO_Port, LC1_Pin, GPIO_MODE_OUT);
  103. GPIO_SetPinSpeed(LC1_GPIO_Port, LC1_Pin, GPIO_OSPEED_HI);
  104. GPIO_SetPinPull(LC1_GPIO_Port, LC1_Pin, GPIO_PUPDR_DW);
  105. GPIO_SetPinMode(LC2_GPIO_Port, LC2_Pin, GPIO_MODE_OUT);
  106. GPIO_SetPinSpeed(LC2_GPIO_Port, LC2_Pin, GPIO_OSPEED_HI);
  107. GPIO_SetPinPull(LC2_GPIO_Port, LC2_Pin, GPIO_PUPDR_DW);
  108. GPIO_SetPinMode(LC3_GPIO_Port, LC3_Pin, GPIO_MODE_OUT);
  109. GPIO_SetPinSpeed(LC3_GPIO_Port, LC3_Pin, GPIO_OSPEED_HI);
  110. GPIO_SetPinPull(LC3_GPIO_Port, LC3_Pin, GPIO_PUPDR_DW);
  111. /* Pwer Shutdown: PP out, high speed, pull down */
  112. GPIO_SetPinMode(SHDN_GPIO_Port, SHDN_Pin, GPIO_MODE_OUT);
  113. GPIO_SetPinSpeed(SHDN_GPIO_Port, SHDN_Pin, GPIO_OSPEED_HI);
  114. GPIO_SetPinPull(SHDN_GPIO_Port, SHDN_Pin, GPIO_PUPDR_DW);
  115. /* SPI Latch: OD out, high speed, no pull */
  116. GPIO_SetPinMode(Latch_GPIO_Port, Latch_Pin, GPIO_MODE_OUT);
  117. GPIO_SetPinOutputType(Latch_GPIO_Port, Latch_Pin, GPIO_OTYPE_OD);
  118. GPIO_SetPinSpeed(Latch_GPIO_Port, Latch_Pin, GPIO_OSPEED_HI);
  119. /* UART_Enable: PP out, low speed, no pull*/
  120. GPIO_SetPinMode(UART_EN_GPIO_Port, UART_EN_Pin, GPIO_MODE_OUT);
  121. /* UART_State: input, pull up */
  122. GPIO_SetPinPull(UART_ST_GPIO_Port, UART_ST_Pin, GPIO_PUPDR_UP);
  123. /* BTN1, BTN2, BTN3, BTN4: input, pull up */
  124. GPIO_SetPinPull(BTN1_GPIO_Port, BTN1_Pin, GPIO_PUPDR_UP);
  125. GPIO_SetPinPull(BTN2_GPIO_Port, BTN2_Pin, GPIO_PUPDR_UP);
  126. GPIO_SetPinPull(BTN3_GPIO_Port, BTN3_Pin, GPIO_PUPDR_UP);
  127. GPIO_SetPinPull(BTN4_GPIO_Port, BTN4_Pin, GPIO_PUPDR_UP);
  128. }
  129. /**
  130. * @brief TIM1 Initialization Function
  131. * @param None
  132. * @retval None
  133. */
  134. static void TIM1_Init(void)
  135. {
  136. /* Peripheral clock TIM1 enable */
  137. RCC->APBENR2 |= RCC_APBENR2_TIM1EN;
  138. /* Peripheral clock GPIOA enable */
  139. RCC->IOPENR |= RCC_IOPENR_GPIOAEN;
  140. /* target clock - 200 Hz */
  141. TIM1->PSC = TIM1_PSC; // prescaler
  142. TIM1->ARR = TIM1_ARR; // auto reload value
  143. TIM1->CR1 = TIM_CR1_ARPE;
  144. // initial pwm value
  145. TIM1->CCR1 = PWM_TUBE_INIT_VAL;
  146. TIM1->CCR2 = PWM_LED_INIT_VAL;
  147. TIM1->CCR3 = PWM_LED_INIT_VAL;
  148. TIM1->CCR4 = PWM_LED_INIT_VAL;
  149. // pwm mode 1 for 4 chanels
  150. TIM1->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  151. TIM1->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  152. // reset int flag - not needed, int unused
  153. //TIM1->SR |= TIM_SR_UIF;
  154. TIM1->BDTR = TIM_BDTR_MOE; // enable main output
  155. TIM1->EGR = TIM_EGR_UG; // force timer update
  156. /* TIM1 CC_EnableChannel */
  157. TIM1->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  158. /* TIM_EnableCounter */
  159. TIM1->CR1 |= TIM_CR1_CEN;
  160. /** TIM1 GPIO Configuration
  161. PA8 ------> TIM1_CH1
  162. PA9 ------> TIM1_CH2
  163. PA10 ------> TIM1_CH3
  164. PA11 [PA9] ------> TIM1_CH4
  165. */
  166. GPIO_SetPinMode(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_MODE_AFF);
  167. GPIO_SetPinSpeed(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_OSPEED_HI);
  168. GPIO_SetPinPull(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_PUPDR_DW);
  169. GPIO_SetAFPin_8_15(PWM_1_GPIO_Port, PWM_1_Pin, GPIO_AF_2);
  170. GPIO_SetPinMode(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_MODE_AFF);
  171. GPIO_SetPinSpeed(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_OSPEED_HI);
  172. GPIO_SetPinPull(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_PUPDR_DW);
  173. GPIO_SetAFPin_8_15(PWM_R_GPIO_Port, PWM_R_Pin, GPIO_AF_2);
  174. GPIO_SetPinMode(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_MODE_AFF);
  175. GPIO_SetPinSpeed(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_OSPEED_HI);
  176. GPIO_SetPinPull(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_PUPDR_DW);
  177. GPIO_SetAFPin_8_15(PWM_B_GPIO_Port, PWM_B_Pin, GPIO_AF_2);
  178. GPIO_SetPinMode(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_MODE_AFF);
  179. GPIO_SetPinSpeed(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_OSPEED_HI);
  180. GPIO_SetPinPull(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_PUPDR_DW);
  181. GPIO_SetAFPin_8_15(PWM_G_GPIO_Port, PWM_G_Pin, GPIO_AF_2);
  182. }
  183. /**
  184. * @brief TIM3 Initialization Function
  185. * @param None
  186. * @retval None
  187. */
  188. static void TIM3_Init(void)
  189. {
  190. /* Peripheral clock TIM1 enable */
  191. RCC->APBENR1 |= RCC_APBENR1_TIM3EN;
  192. /* Peripheral clock GPIOA and GPIOB enable */
  193. RCC->IOPENR |= (RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN);
  194. /* target clock - 200 Hz */
  195. TIM3->PSC = TIM3_PSC; // prescaler
  196. TIM3->ARR = TIM3_ARR; // auto reload value
  197. TIM3->CR1 = TIM_CR1_ARPE;
  198. // initial pwm value
  199. TIM3->CCR1 = PWM_TUBE_INIT_VAL;
  200. TIM3->CCR2 = PWM_TUBE_INIT_VAL;
  201. TIM3->CCR3 = PWM_TUBE_INIT_VAL;
  202. TIM3->CCR4 = PWM_TUBE_INIT_VAL;
  203. // pwm mode 1 for 4 chanels
  204. TIM3->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC1PE | TIM_CCMR1_OC2PE);
  205. TIM3->CCMR2 = (TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC3PE | TIM_CCMR2_OC4PE);
  206. // launch timer
  207. TIM3->EGR = TIM_EGR_UG; // force timer update
  208. /* TIM3 TIM_CC_EnableChannel */
  209. TIM3->CCER = (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E);
  210. /* TIM3 enable */
  211. TIM3->CR1 |= TIM_CR1_CEN;
  212. /**TIM3 GPIO Configuration
  213. PA6 ------> TIM3_CH1
  214. PA7 ------> TIM3_CH2
  215. PB0 ------> TIM3_CH3
  216. PB1 ------> TIM3_CH4
  217. */
  218. GPIO_SetPinMode(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_MODE_AFF);
  219. GPIO_SetPinSpeed(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_OSPEED_HI);
  220. GPIO_SetPinPull(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_PUPDR_DW);
  221. GPIO_SetAFPin_0_7(PWM_5_GPIO_Port, PWM_5_Pin, GPIO_AF_1);
  222. GPIO_SetPinMode(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_MODE_AFF);
  223. GPIO_SetPinSpeed(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_OSPEED_HI);
  224. GPIO_SetPinPull(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_PUPDR_DW);
  225. GPIO_SetAFPin_0_7(PWM_4_GPIO_Port, PWM_4_Pin, GPIO_AF_1);
  226. GPIO_SetPinMode(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_MODE_AFF);
  227. GPIO_SetPinSpeed(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_OSPEED_HI);
  228. GPIO_SetPinPull(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_PUPDR_DW);
  229. GPIO_SetAFPin_0_7(PWM_3_GPIO_Port, PWM_3_Pin, GPIO_AF_1);
  230. GPIO_SetPinMode(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_MODE_AFF);
  231. GPIO_SetPinSpeed(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_OSPEED_HI);
  232. GPIO_SetPinPull(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_PUPDR_DW);
  233. GPIO_SetAFPin_0_7(PWM_2_GPIO_Port, PWM_2_Pin, GPIO_AF_1);
  234. }
  235. /**
  236. * @brief TIM14 Initialization Function
  237. * @param None
  238. * @retval None
  239. * @desc "Блинкование" разрядами - 0,75/0,25 сек вкл/выкл.
  240. */
  241. static void TIM14_Init(void)
  242. {
  243. /* Peripheral clock enable */
  244. RCC->APBENR2 |= RCC_APBENR2_TIM14EN;
  245. /* TIM14 interrupt Init */
  246. NVIC_SetPriority(TIM14_IRQn, 0);
  247. NVIC_EnableIRQ(TIM14_IRQn);
  248. /* Set TIM14 for 1 sec period */
  249. TIM14->PSC = TIM14_PSC;
  250. TIM14->ARR = TIM14_ARR;
  251. /* Enable: Auto-reload preload, One-pulse mode, */
  252. TIM14->CR1 = (TIM_CR1_ARPE | TIM_CR1_OPM);
  253. /* OC or PWM? (for pwm - (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) ) , Output compare 1 preload */
  254. TIM14->CCMR1 = (TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1PE);
  255. /* Enable Channel_1 or no needed ??? */
  256. TIM14->CCER = TIM_CCER_CC1E;
  257. /* Impulse value in msek */
  258. TIM14->CCR1 = TIM14_PULSE_VAL;
  259. /* Enable IRQ for Update end CaptureCompare envents or only CC ??? */
  260. //TIM14->DIER = (TIM_DIER_UIE | TIM_DIER_CC1IE);
  261. TIM14->DIER = TIM_DIER_CC1IE;
  262. }
  263. /**
  264. * На старте активируем все каналы, при совпадении отключаем (не)нужные.
  265. */
  266. void Blink_Start(void)
  267. {
  268. /* enable all channels */
  269. TUBE_ALL_ON;
  270. /* clear IRQ flag */
  271. TIM14->SR |= TIM_SR_CC1IF;
  272. /* clear counter value */
  273. TIM14->CNT = 0;
  274. /* enable timer */
  275. TIM14->CR1 |= TIM_CR1_CEN;
  276. }
  277. void Blink_Stop(void)
  278. {
  279. /* disable timer */
  280. TIM14->CR1 &= ~(TIM_CR1_CEN);
  281. /* On all tubes */
  282. TUBE_ALL_ON;
  283. }
  284. /**
  285. * @brief TIM16 Initialization Function
  286. * @param None
  287. * @retval None
  288. */
  289. static void TIM16_Init(void)
  290. {
  291. /* Peripheral clock enable */
  292. RCC->APBENR2 |= RCC_APBENR2_TIM16EN;
  293. /* TIM16 interrupt Init */
  294. NVIC_SetPriority(TIM16_IRQn, 0);
  295. NVIC_EnableIRQ(TIM16_IRQn);
  296. /* setup clock */
  297. TIM16->PSC = TIM16_PSC; // prescaler
  298. TIM16->ARR = TIM16_ARR; // auto reload value
  299. TIM16->CR1 = TIM_CR1_ARPE;
  300. // initial pwm value
  301. //TIM16->CCR1 = TIM16_PWM_VAL;
  302. // pwm mode 1 for 1 chanel
  303. TIM16->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  304. // reset int flag
  305. TIM16->SR |= TIM_SR_UIF;
  306. TIM16->BDTR = TIM_BDTR_MOE; // enable main output
  307. TIM16->EGR = TIM_EGR_UG; // force timer update
  308. /* TIM16 CC_EnableChannel */
  309. TIM16->CCER = TIM_CCER_CC1E;
  310. /* TIM_EnableCounter */
  311. TIM16->CR1 |= TIM_CR1_CEN;
  312. /* Enable IRQ */
  313. TIM16->DIER = TIM_DIER_UIE;
  314. }
  315. /**
  316. * @brief TIM17 Initialization Function
  317. * @param None
  318. * @retval None
  319. */
  320. static void TIM17_Init(void)
  321. {
  322. /* Peripheral clock enable */
  323. RCC->APBENR2 |= RCC_APBENR2_TIM17EN;
  324. /* TIM17 interrupt Init */
  325. NVIC_SetPriority(TIM17_IRQn, 0);
  326. NVIC_EnableIRQ(TIM17_IRQn);
  327. /* setup clock */
  328. TIM17->PSC = TIM17_PSC; // prescaler
  329. TIM17->ARR = TIM17_ARR; // auto reload value
  330. TIM17->CR1 = TIM_CR1_ARPE;
  331. // initial pwm value
  332. //TIM17->CCR1 = TIM17_PWM_VAL;
  333. // pwm mode 1 for 1 chanel
  334. TIM17->CCMR1 = (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE);
  335. // reset int flag
  336. TIM17->SR |= TIM_SR_UIF;
  337. TIM17->BDTR = TIM_BDTR_MOE; // enable main output
  338. TIM17->EGR = TIM_EGR_UG; // force timer update
  339. /* TIM17 CC_EnableChannel */
  340. TIM17->CCER = TIM_CCER_CC1E;
  341. /* TIM_EnableCounter */
  342. TIM17->CR1 |= TIM_CR1_CEN;
  343. /* Enable IRQ */
  344. TIM17->DIER = TIM_DIER_UIE;
  345. }
  346. /**
  347. * @brief USART1 Initialization Function
  348. * @param None
  349. * @retval None
  350. */
  351. static void USART1_UART_Init(void)
  352. {
  353. /* Peripheral clock enable */
  354. RCC->APBENR2 |= RCC_APBENR2_USART1EN;
  355. RCC->IOPENR |= RCC_IOPENR_GPIOBEN;
  356. /**USART1 GPIO Configuration
  357. PB6 ------> USART1_TX
  358. PB7 ------> USART1_RX
  359. */
  360. GPIO_SetPinMode(GPIOB, GPIO_PIN_6, GPIO_MODE_AFF);
  361. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_6, GPIO_OSPEED_HI);
  362. GPIO_SetPinMode(GPIOB, GPIO_PIN_7, GPIO_MODE_AFF);
  363. GPIO_SetPinSpeed(GPIOB, GPIO_PIN_7, GPIO_OSPEED_HI);
  364. /* USART1 interrupt Init */
  365. NVIC_SetPriority(USART1_IRQn, 0);
  366. NVIC_EnableIRQ(USART1_IRQn);
  367. USART1->CR1 |= (USART_CR1_TE |USART_CR1_RE);
  368. USART1->BRR = 138;
  369. /* USART1 Enable */
  370. USART1->CR1 |= USART_CR1_UE;
  371. /* Polling USART1 initialisation */
  372. while((!(USART1->ISR & USART_ISR_TEACK)) || (!(USART1->ISR & USART_ISR_REACK)))
  373. {
  374. }
  375. }